VSS Filter logic.

[ashford]

i have use an ncv1124 chip on both gpio's i have assembled and it has cured all of my vss issues. i have don this on a separate slide in board, but with some thinking and a map of the vr section of the board it could probably be soldered right on.

[Bernard Fife]

Tobmag,

I think there might be a way for the code to check if the amplitude is getting very low, and have the code filter out such signals.

Because the trigger isn't zero, we can use the edge timing to determine if the amplitude is getting low. The circuit doesn't trigger at zero volts, it triggers a bit higher (how much higher depends on the resistor values used). If the signal amplitude is high, the output signal is close to a 50% duty cycle square wave because the signal is nearly vertical at the zero-crossings. As the amplitude decreases, the slope at the zero-crossings becomes shallower, and the square wave duty cycle decreases.

To make use of this, we would enable the VSS interrupt on *both* edges at very low speeds (but speeds that still gave stable signal on the speedo). Once using both edges, if the ratio between even and odd numbered periods got too far away from 50% (<30%, for example), it would mean that the amplitude is getting very low, and the speed should be set to zero until the ratio comes closer to 50% (>30%).

Using both edges at very low speeds would have the added advantage of doubling the timer range (halving the tooth period), allowing even slower speeds to be handled if the signal was strong enough.

The switch-over from one to two edges needs to be handled carefully. We don't want to use both edges all the time, because at high speeds the interrupts come very fast (~2600 Hz at 100mph), so we don't want more than necessary. Also, the timer count would be halved at the high end by using both edges, loosing resolution and potential top end speed abilities.

I'll implement this idea in some test code that I will post here (it might take a day or two).

Lance.

[tobmag]

Lance.

Looks like you have a plan......

I'll wait for the test code.

Br//Tobmag

[tobmag]

i have use an ncv1124 chip on both gpio's i have assembled and it has cured all of my vss issues. i have don this on a separate slide in board, but with some thinking and a map of the vr section of the board it could probably be soldered right on.

Ive been looking at this one as well and some others too....

I'll wait and see first what Lance comes up with but I agree that the VR input circuit are very generic but thats the whole idea with the GPIO to start with....

Br//Tobmag

[tobmag]

Lance.

I didnt build up a new VR circuit but I had a Schmitt trigger made out of a 555IC.

I ran some sweeps comparing the OS signal in TS, as we see below there is a huge difference in liniarity
The sweep is 30sec going from 1hz to 500hz. The jumpy red line is the ISS circuit, the nice looking red line is by the Schmitt trigger
Same tune and filtering was used in both cases.

I did not solve the amplitude issue below 50hz.
Speedo can be stable at differnt amplitudes at low frequensis but as soon as I change the amplitude it starts jumping around agin...


BR//Tobmag

[Bernard Fife]

Tobmag,

I'm working on the other issues, but I may need to build a Schmidt 555 trigger circuit. Not having hardware hysteresis is a the root of many of the VR circuit's problems, I suspect. If the 555 trigger circuit works well, I will likely get a bunch of small PCBs made that will adapt easily to the GPIO board. I'll work on this.

Lance.

[Bernard Fife]

Tobmag,

I am still working on this, but not making much progress at the moment. The solution I proposed above didn't help much, and it's clear that the hardware is source of the problem. It's proving difficult to band-aid this issue in software, so I will look at hardware adjustments next.

In the meantime, I have posted code that lets you use an external VSS signal over the CANbus instead of the internal signal. You can read about that here: viewtopic.php?f=4&t=240&p=3752#p3752

Lance.

[Bernard Fife]

Tobmag,

It looks like we can make a Schmitt trigger (i.e. a trigger circuit with hardware hysteresis) from the VRx circuits fairly easily. Three resistors would have to be jumpered in:
- the first resistor connects from ground to the emitter pins lifted on the transistors (these pins are currently soldered directly to ground). The two transistors' emitter pins are jumpered together.
- one trace would have to be cut and the second resistor jumpered across the transistor pins the trace formerly joined.
- one end of the second resistor is connected to ground via a third resistor.

As well, some resistor values would need to be changed, because the trigger and hysteresis values are set by choosing appropriate values for some the existing resistors. I will work out the best combination of resistor values for both "retrofitting" and new builds and post them soon.

This would be easier to do on a new build than modifying an existing circuit, but it should be possible either way.

I will build up a few examples of the proposed circuit in the next day or two, and see how this works on my bench. If all goes well, I will post full instructions here for those that want to test. If people find it helps, I will add it to the build instructions.

Lance.

[tobmag]

Lance.

Its good if you can implement a pot for setting the trigger treshold.
I have found that it takes some trimmimg even using the 555 to get it to work properly but now its stable from 50hz and up.

I have also ordered the the same signal conditioner as gui76 uses, just to test.....

BR//Tobmag

[Bernard Fife]

Tobmag,

There will be an upper trigger threshold and a lower trigger threshold (these set the minimum voltage to trigger, and the minimum level the voltage must sink to between triggers). These threshold voltages are set by separate resistors. It will be possible for people to jumper pots in as variable resistors, but I'll have to think of a good way to mount them (maybe to the case so they can be adjusted externally 'on-the-fly'...).

Lance.